1. Field of the Invention
The present invention relates to a circuit for regulating the output voltage of a voltage multiplier which is particularly effective in reducing power consumption.
2. Description of the Prior Art
In integrated circuits when a higher voltage than the supply voltage of the device is required, as for example in EEPROM and EPROM type memory devices, a peculiar circuit known as voltage multiplier capable of producing an output voltage of several tens Volts starting from an input supply voltage of about 5 Volts and of delivering a current of about few tens microampers is employed. This circuit is well known and described in literature and is commonly associated with an oscillator which produces two signals with a 180.degree. phase-shift between them, necessary for driving electric charge transfer through the various stages of the voltage multiplier, each stage being formed essentially by a diode and by a capacitor, in a single direction from a supply terminal to an output capacitor across which the multiplied voltage is produced, and with control means of the output voltage for keeping it constant independently from the load and/or from changes of the supply voltage.
A complete voltage multiplier system which is commonly used in integrated circuits is depicted in FIG. 1.
In the diagram the three circuit blocks forming the system are depicted. The voltage multiplier is a four stage circuit, each stage being formed by a diode (diode connected transistor) and by a capacitor, connected so as to transfer the charge in a single direction from an input terminal to an output terminal thereof, i.e. from the supply terminal VCC to the output capacitor COUT. The oscillator generating the two driving signals phi 1 and phi 2, with a 180.degree. phase difference for driving the voltage multiplier is a common ring-type oscillator, wherein one of the three inverters composing it is substituted by a Schmitt trigger in order to achieve a greater ring's gain, and a second inverter is substituted by a NOR gate in order to permit interruption of the oscillation by applying a logic stop signal to the C terminal. The regulation means of the output voltage of the voltage multiplier is, as customary, formed by a "chain" of series-connected diodes (diode-connected transistors) connected between the high voltage (HV) output terminal and ground; the output voltage being adjusted to a value corresponding to the sum of the threshold voltages of the diode-connected transistors forming the chain. Of course the regulation means may also be implemented by means of one or more Zener diodes or by one or more parasitic transistors, according to techniques which are well known to the skilled technician.
All these simple regulators which are commonly used for stabilizing the output voltage of a voltage multiplier, being the overall current delivered by such a circuit generally very small, absorb a relatively significant portion of the current being delivered to the load, i.e. to the circuit which is supplied with the high voltage, without an excessive variation of the output voltage. Of course the current drawn by the regulating chain is higher the more capable the voltage multiplier is of delivering current to it, and this largely depends upon the frequency of oscillation of the driving signals phi 1 and phi 2 and upon the capacitance of the "pumping" capacitors of the voltage multiplier.
Since the voltage multiplier must be designed so as to be capable of supplying at least the current required by the high voltage circuits fed under the worst operation situation which may be contemplated, the operating frequency of the oscillator must be set at least to a value sufficient to generate such a contemplated maximum current to be delivered. As a consequence, under any other different working situation, an unduly high frequency of oscillation inevitably produces a waste of energy because the excess current produced by the voltage multiplier is discharged to ground by the regulation means of the output voltage. Moreover these output voltage regulation means, made in accordance with common techniques, may significantly modify the output voltage when the current absorption becomes too high and above all may increase the power consumption due to the oscillator switching itself, this power consumption becoming remarkable when the capacitances to be driven by the driving signals phi 1 and phi 2 produced by the oscillator sum up to several tens picoFarads and when the oscillator frequency is about 5-6 MHz.
Though these high consumption conditions may not be encountered normally in correctly designed circuits and wherein the supply voltage VCC is sufficiently stable, the case is different when the supply voltage may vary, for example, from 2.5 V to 5.5 V, or in devices designed for operation with either one of two contemplated voltages, e.g. 3 and 5 V.
In these instances, once a minimum frequency compatible with a supply voltage of, for example, 2.5 V of the oscillator is set during designing, the frequency will be sensibly higher when the supply voltage is 5.5 V with a consequent sensible increase of the current delivered by the voltage multiplier and therefore of the power consumption in general.